Compiler verification in the context of pervasive system verification

This thesis presents the formal verification of the compiling specification for a simple, non-optimizing compiler from the C-like programming language C0 to VAMP assembly code. The main result is a step-by-step simulation theorem between C0 programs and the compiled code (which is specified by the compiling specification). Additionally, a C0 small-step semantics and a verification methodology for VAMP assembly have been developed. This work is part of the Verisoft project which aims at the pervasive formal verification of an entire computer system. The key concept in Verisoft’s methodology is to prove properties of computer systems at the relatively abstract C0 layer and to transfer them via several intermediate layers down to the concrete hardware layer. After successful transfer of a property to the hardware layer, we can be sure that no oversimplifications have been done in the formalizations of the more abstract layers. This context of pervasive system verification imposes several special requirements to our compiler correctness theorem. In particular, the simulation theorem had to be formulated based on small-step semantics to allow for reasoning about non-terminating and interleaving programs. Another important feature is that our result incorporates resource restrictions at the hardware layer and allows to discharge them at the C0 layer. All results presented in this thesis have been formalized in the theorem prover Isabelle / HOL.